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Você está aqui: Home Services Frequently Asked Questions Topography of Integrated Circuits
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Topography of Integrated Circuits

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Published in May 13, 2020 02:34 PM Updated in Oct 21, 2020 11:24 AM

What is a registration of integrated circuit topography?

Pursuant to art. 26 of Law nº 11,484/07, integrated circuit topography is a series of related images representing the three-dimensional setting of layers that compose an integrated circuit and in which each image represents, in whole or in part, the geometric arrangement of the surface of the integrated circuit in any stage of its conception or manufacture.

The registration entitles its holder to the exclusive right to explore topography, and the use of third parties without consent is prohibited. The protection is valid for ten years of the date of application or the date of first exploration (whichever occurs first). The application must be filed for only one integrated circuit topography.

 

In order to file the application, the following are necessary:

  • Accessing INPI’s portal
  • Registering and creating a login and a password
  • Using the GRU module to issue the payment voucher
  • Downloading the document DV and signing it digitally
  • Paying the GRU
  • Accessing the e-Chip electronic form in INPI’s portal, filling it out and attaching:
  1. - Veracity Declaration
  2. - Power of attorney, if any, digitally signed by the authorized parties
  3. - Description of the topography and its related function. This document attached shall be in PDF format. Information in this document are under the responsibility of the topography creator and aim at constituting an additional document to inform the main characteristics, components, applications, among other relevant information, of the topography
  4. - The designs prepared in Computer-Aided Design (CAD) software for integrated circuits, in the formats established by Normative Instruction No. 109/2019, which are GDS/GDS-II (extension .gds) or OASIS (extension .oas)
  • Checking declared information
  • Submitting the e-Chip electronic form, after which the application number will be generated
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      • Basic Guide
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      • INPI-ANVISA Inter-institutional Coordination Group (GAI)
      • Publication codes
      • Prioritized examination
      • PPH
      • Backlog Combat Plan
    • Industrial Designs
      • Archives
      • Basic Guide
      • Classification
      • Laws and Regulations
    • Geographical Indications
      • Archives
      • Basic Guide
      • Laws and Regulations
    • Software
      • Basic Guide
      • Laws and Regulations
    • Integrated Circuit Topographies
      • Basic Guide
      • Laws and Regulations
      • Archives
    • Technology Transfer Agreements
      • Basic Guide
      • Archives
    • Academy
      • About the Academy
      • Postgraduate
      • Extension
      • Publications
      • Library
    • Appeals and Invalidation Procedures
  • Access to information
    • Institutional
    • Open Data
  • Governance
    • Strategic planning
    • Quality Management
    • Ethics
    • Integrity Program
    • Authorities’ Agenda
    • Transparency and Accountability
    • Treatment of Personal Data
    • Information security
  • Strategic use of Industrial Property
    • International Trademark System (Madrid)
    • International Patent System (PCT/CUP)
    • Priority Patent Proceedings
    • International Relations
      • Bilateral, Regional, and Multilateral Activities
    • National and regional cooperation
    • Studies and Technological Information
  • Institutional projects
    • Combating Patent Backlog
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